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Novel High-Speed and Ultra-Low-Voltage CMOS NAND and NOR Domino Gates

Authors:
Yngvar Berg
Omid Mirmotahari

Keywords: Low-Voltage, High-Speed, NAND2, NOR2, CMOS, Floating-Gate

Abstract:
In this paper we present novel ultra-low-voltage and high-speed CMOS NAND and NOR gates. For supply voltages below 500mV the delay for an ultra-low-voltage NAND2 gate is approximately 10% of a complementary CMOS inverter. Furthermore, the delay variations due to mismatch are much lesser than for conventional CMOS. Differential domino gates for AND2/NAND2 and OR2/NOR2 operation are presented. Ultra-low-voltage pass transistors are presented which can be used as latching gates. The ultra-low-voltage gates presented are going to be used for implementation oflow-voltage and high speed adders.

Pages: 5 to 10

Copyright: Copyright (c) IARIA, 2012

Publication date: August 19, 2012

Published in: conference

ISSN: 2308-426X

ISBN: 978-1-61208-213-4

Location: Rome, Italy

Dates: from August 19, 2012 to August 24, 2012