Home // CENICS 2012, The Fifth International Conference on Advances in Circuits, Electronics and Micro-electronics // View article
Reliable CMOS VLSI Design Considering Gate Oxide Breakdown
Authors:
Kyung Ki Kim
Keywords: TDDB; Reliability; Gate oxide breakdown; Time dependent dielectric breakdown; Aging effect
Abstract:
As technology scales down into the nanometer region, the reliability mechanism caused by time dependent dielectric breakdown (TDDB) has become one of the major reliability concerns. TDDB can lead to performance degradation or logic failures in nanoscale CMOS devices, and can cause significant increase of leakage power in the standby mode. In this paper, the TDDB effects on the delay and power of the nanoscale CMOS circuits are analyzed using ISCAS85 benchmark circuits that are designed using a 45-nm CMOS predictive technology model. Based on the TDDB analysis, a reliable CMOS VLSI design methodology using a redundancy system has been proposed.
Pages: 50 to 53
Copyright: Copyright (c) IARIA, 2012
Publication date: August 19, 2012
Published in: conference
ISSN: 2308-426X
ISBN: 978-1-61208-213-4
Location: Rome, Italy
Dates: from August 19, 2012 to August 24, 2012