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A Synthesizable VHDL Export for the Custom Architecture Design Tool CustArD

Authors:
Thomas Fabian Starke
Timm Bostelmann
Helga Karafiat
Sergei Sawitzki

Keywords: FPGA; architecture design; VHDL; CustArD

Abstract:
The research of reconfigurable architectures usually goes hand in hand with a high amount of non-recurring work for Electronic Design Automation (EDA) tool development or adaption. Therefore, in previous work, a heterogeneous architecture template for application domain specific reconfigurable logic was proposed. The goal of this template is to allow the optimization of a reconfigurable architecture towards a specific application domain and to reduce the effort for tool generation in architecture research. In this work, a method to export the described architecture for synthesis is presented. It can be used for a silicon or Field-Programmable Gate Array (FPGA) overlay implementation and thereby extends the usability of the existing design flow. In the future, this work could even be used do derive a detailed timing-model for the designed architectures.

Pages: 44 to 48

Copyright: Copyright (c) IARIA, 2017

Publication date: September 10, 2017

Published in: conference

ISSN: 2308-426X

ISBN: 978-1-61208-585-2

Location: Rome, Italy

Dates: from September 10, 2017 to September 14, 2017