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A Study of Deep Learning Robustness Against Computation Failures

Authors:
Jean-Charles Vialatte
Francois Leduc-Primeau

Keywords: Deep learning; quasi-synchronous circuits; energy-efficient computing

Abstract:
For many types of integrated circuits, accepting larger failure rates in computations can be used to improve energy efficiency. We study the performance of faulty implementations of certain deep neural networks based on pessimistic and optimistic models of the effect of hardware faults. After identifying the impact of hyperparameters such as the number of layers on robustness, we study the ability of the network to compensate for computational failures through an increase of the network size. We show that some networks can achieve equivalent performance under faulty implementations, and quantify the required increase in computational complexity.

Pages: 65 to 68

Copyright: Copyright (c) IARIA, 2017

Publication date: February 19, 2017

Published in: conference

ISSN: 2308-4197

ISBN: 978-1-61208-531-9

Location: Athens, Greece

Dates: from February 19, 2017 to February 23, 2017