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Specification and Verification of the Triple-Modular Redundancy Fault Tolerant System using CSP

Authors:
Tan Lanfang
Tan Qingping
Li Jianli

Keywords: TMR System; fault tolerance; verification; CSP

Abstract:
A case study on the application of Communicating Sequential Processes (CSP) to the specification and verification of fault tolerant systems is presented. The Triple-Modular Redundancy (TMR) mechanism is a classical design technique for tolerating hardware errors. By specifying the behavior of the faultless module as a CSP process, the behavior of TMR system suffering from hardware errors can be verified as a refinement of the one of the faultless module.

Pages: 14 to 17

Copyright: Copyright (c) IARIA, 2011

Publication date: August 21, 2011

Published in: conference

ISSN: 2308-4324

ISBN: 978-1-61208-149-6

Location: Nice/Saint Laurent du Var, France

Dates: from August 21, 2011 to August 27, 2011