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Mapping of State Machines to Code: Potentials and Challenges

Authors:
Mehrdad Saadatmand
Antonio Cicchetti

Keywords: State Machines; Runtime Verification; Behavioral Modeling; Testing

Abstract:
There is a big number of testing methods which are based on the state machine formalism. State machines serve as a strong means in behavior modeling of computer systems. However, this strength is lost as we go down the abstraction level from models to code. This is essentially due to the inherent semantic gap between state machine models and code, and that it is generally a challenging task to track states and transitions at runtime. In this paper, we discuss the benefits and challenges of having a mechanism for mapping state machines to code. The main intention with such a mechanism is to enable tracking of state changes at runtime. As we explain in this paper, the mapping provides for several important testing features such as verifying the actual runtime behavior of the system against its state machine models. Its importance becomes further emphasized remembering that model-based static analysis techniques rely on models as the source of information and design assumptions, and therefore, any mismatch between the actual behavior of the system and its models can also imply invalidation of the analysis results.

Pages: 247 to 251

Copyright: Copyright (c) IARIA, 2014

Publication date: October 12, 2014

Published in: conference

ISSN: 2308-4235

ISBN: 978-1-61208-367-4

Location: Nice, France

Dates: from October 12, 2014 to October 16, 2014