Home // ICWMC 2012, The Eighth International Conference on Wireless and Mobile Communications // View article

Efficient Interpolation Architecture for Soft-Decision List Decoding of Reed-Solomon Codes

Authors:
Sungman Lee
Taegeun Park

Keywords: VLSI architecture; Polynomial interpolation; Reed-Solomon codes; Soft-decision list decoding

Abstract:
Recently, algebraic soft-decision decoding algorithm for RS codes that can correct the errors beyond the error correcting bound has been proposed. The main task in the algorithm is the weighted interpolation of a bivariate polynomial that requires intensive computations. In this paper, we propose an efficient architecture with low hardware complexity for interpolation in soft-decision list decoding of Reed-Solomon codes. The proposed architecture processes the candidate polynomial in such a way that the terms of X degrees are processed in serial and the terms of Y degrees are processed in parallel. The processing order of candidate polynomials adaptively changes to increase the efficiency of memory access for coefficients. The proposed interpolation architecture for the (255, 239) RS list decoder is designed and synthesized using the DonbuAnam 0.18um standard cell library. The maximum operating clock frequency is 200MHz and the synthesized gate count is about 25.1K gates in two-input equivalent NAND gates.

Pages: 25 to 30

Copyright: Copyright (c) IARIA, 2012

Publication date: June 24, 2012

Published in: conference

ISSN: 2308-4219

ISBN: 978-1-61208-203-5

Location: Venice, Italy

Dates: from June 24, 2012 to June 29, 2012