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Comparative Analysis of 130nm PDSOI and 28nm FDSOI Technologies for 5G Power Amplifier Applications

Authors:
Marcos Carneiro
Tristan Lecocq
Eric Kerherve
Magali de Matos
Thierry Taris
Jean-Marie Pham

Keywords: Power Amplifier; CMOS; 130 nm PDSOI; 28 nm FDSOI; 5G applications; Nb-IoT.

Abstract:
This paper analyzes 130 nm Partially Depleted (PD) Silicon-On-Insulator (SOI) and 28 nm Full Depleted (FD) SOI technologies and proposes the design of two Power Amplifiers (PAs) for 5G Narrow Band-Internet of Things (NB-IoT) applications. They were fabricated and measured, demonstrating the gain adjustment capability of FDSOI technology via back-gate voltage, allowing approximately 3.6 dB of gain adjustment. Both PAs consist of a gain stage (driver) and a power stage, using pseudo-differential and cascode topologies. The 28 nm PA includes an additional stacked transistor in the power stage to accommodate a higher drain bias voltage. Both PAs met the required performance parameters in post-layout simulations, achieving maximum Power-Added Efficiency (PAEmax) of 49% and 38.5%, gain of 36 dB and 34 dB and saturated Power (Psat) of 32 dBm and 28.8 dBm, respectively for 130 nm and 28 nm, placing them at the state-of-the art.

Pages: 10 to 15

Copyright: Copyright (c) IARIA, 2025

Publication date: March 9, 2025

Published in: conference

ISSN: 2308-4219

ISBN: 978-1-68558-232-6

Location: Lisbon, Portugal

Dates: from March 9, 2025 to March 13, 2025