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Enhanced Arbiter PUF Construction Model to Strengthening PUF-based Authentication

Authors:
Rizka Reza Pahlevi
Hirokazu Hasegawa
Yukiko Yamaguchi
Hajime Shimada

Keywords: physical unclonable functions, authentication, arbiter PUF.

Abstract:
In recent years, ensuring robust security in digital systems has become increasingly challenging, particularly in the realm of authentication. Physical Unclonable Functions (PUFs) have emerged as a promising solution due to their intrinsic ability to leverage manufacturing variations to produce unique and unpredictable responses. This paper presents a novel arbiter PUF construction designed to enhance authentication. The proposed PUF incorporates a cyclic model with four crossed lines in the signature generator to improve overall security. Extensive evaluations on six different Field Programmable Gate Array (FPGA) boards demonstrate that the proposed arbiter PUF achieves ideal levels of uniqueness (40.52% to 58.17%), bit aliasing (48.52% to 60.03%), reliability (80.98% to 96.49%), and balanced uniformity (47.95% to 61.40%). Additionally, the False Acceptance Rate (FAR) and False Rejection Rate (FRR) are maintained within acceptable limits (1.59% to 2.49% for FAR and 1.13% to 2.35% for FRR). Compared to existing arbiter PUF designs, our proposed model shows significant improvements in key security metrics, underscoring its potential for robust and secure authentication applications.

Pages: 58 to 63

Copyright: Copyright (c) IARIA, 2024

Publication date: November 3, 2024

Published in: conference

ISSN: 2162-2116

ISBN: 978-1-68558-206-7

Location: Nice, France

Dates: from November 3, 2024 to November 7, 2024