Home // SPACOMM 2013, The Fifth International Conference on Advances in Satellite and Space Communications // View article

Turbo Decoder VLSI Architecture with Non-Recursive max* Operator for 3GPP LTE Standard

Authors:
Ashfaq Ahmed
Maurizio Martina
Guido Masera

Keywords: 3GPP LTE; iterative decoding; parallel turbo decoder; VLSI architecture

Abstract:
This paper presents a highly parallel turbo decoder architecture for 3GPP LTE standard with a new non-recursive max^{*} operator. High parallelism is introduced at several levels to achieve high throughput, to meet LTE requirements. The decoder supports all codes specified by LTE and features low complexity, obtained by using the new non-recursive max^{*} operator. The decoder achieves a maximum throughput of 376.4 Mbps at 250 MHz, occupying an area of 1.62 mm^{2} on 90-nm Standard Cell ASIC technology . The decoder shows better decoding efficiency (Bits/Cycle/Iterations) and throughput to area ratio (Throughput/mm^{2}) than many of the previously implemented decoders.

Pages: 40 to 45

Copyright: Copyright (c) IARIA, 2013

Publication date: April 21, 2013

Published in: conference

ISSN: 2308-4480

ISBN: 978-1-61208-264-6

Location: Venice, Italy

Dates: from April 21, 2013 to April 26, 2013