Home // International Journal On Advances in Systems and Measurements, volume 12, numbers 1 and 2, 2019 // View article

Accelerating OpenMP Applications Through Parallel Hardware Architecture

Authors:
Atakan Dogan
Ismail San
Kemal Ebcioglu

Keywords: OpenMP applications; high-level synthesis; application-specific hardware; NoCs; system-on-chip

Abstract:
It is a well-known fact that application-specific hardware has both performance and power advantages as compared to general-purpose CPUs and GPUs. Furthermore, in order to improve the computing performance leveraging available parallelism in software and hardware, high-level parallel programming paradigms, such as OpenMP and OpenCL, have been viable choices for designing application-specific hardware. In this study, an application-specific parallel hardware architecture with a specialized memory hierarchy is proposed for a class of fork-join applications that can be modeled by an OpenMP program. Furthermore, three different case studies are provided to show how this model can be employed for the hardware acceleration of such applications.

Pages: 1 to 9

Copyright: Copyright (c) to authors, 2019. Used with permission.

Publication date: June 30, 2019

Published in: journal

ISSN: 1942-261x