Home // VALID 2015, The Seventh International Conference on Advances in System Testing and Validation Lifecycle // View article
Authors:
Mariem Abdelmoula
Daniel Gaffé
Michel Auguin
Keywords: Test Sets; Synchronous Model; Pre-conditions; Numeric Data Processing; Backtrack; AUTSEG V2; SupLDD
Abstract:
AUTSEG is an automatic test set generator for embedded reactive systems. It automatically generates exhaustive test sets and allows to check safety properties of the tested system. A first version of AUTSEG has been initially designed for programs dealing with Boolean inputs and outputs. We present in this paper an extension of this tool called AUTSEG V2 to handle symbolic numeric data processing that provides more expressive and concrete tests of the system. To this end, we have developed a new library called superior linear decision diagrams (SupLDD) built on top of linear decision diagrams (LDD) library. This allows symbolic computation of system data while improving system verification (Determinism, Death sequences) and identifying all possible test cases. Our tool characterizes the system preconditions by numeric constraints to derive automatically the symbolic test cases using a backtracking operation. We demonstrate the application of AUTSEG V2 on an industrial example.
Pages: 23 to 30
Copyright: Copyright (c) IARIA, 2015
Publication date: November 15, 2015
Published in: conference
ISSN: 2308-4316
ISBN: 978-1-61208-441-1
Location: Barcelona, Spain
Dates: from November 15, 2015 to November 20, 2015